Programmable logic devices (PLDs) (e.g., field programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), field programmable system on a chips (FPSCs), or other types of programmable devices) may be configured with various user designs to implement desired functionality. Typically, the user designs are synthesized and mapped into configurable resources (e.g., programmable logic gates, look-up tables (LUTs), embedded hardware, or other resources) and interconnections available in particular PLDs. Physical placement and routing for the synthesized and mapped user designs are then determined to generate configuration data for the particular PLDs.
After being programmed with the configuration data, the PLD may be tested. In some cases, a user design may include several alternative implementations of particular functionality, and a user may wish to switch between the different implementations during testing without having to completely reconfigure the PLD.
Conventionally, such switching is performed using hardware DIP switches on a test board. While the PLD is connected to the test board, the DIP switches are connected to corresponding physical pins of the PLD. To switch between different implementations, a user physically adjusts one or more DIP switches to provide corresponding switched signals to the PLD through the physical pins.
Also during testing, a user may wish to monitor various signals of the PLD. Conventional approaches rely on lights (e.g., light emitting diodes) also provided on the test board. Particular lights are connected to additional corresponding physical pins of the PLD to receive monitored PLD signals routed to the physical pins. For example, a logic high or logic low signal value may be indicated by illuminating or dimming the corresponding light.
Unfortunately, such conventional testing and monitoring procedures rely on limited physical resources of the PLD and test board (e.g., limited numbers of pins, DIP switches, and/or lights). As a result, only a small number of alternative implementations may be tested (e.g., using 8 or fewer DIP switches) and only a small number of signals may be monitored (e.g., using 12 or fewer LEDs). Moreover, such arrangements require physical interaction by the user to adjust the DIP switches and view the lights. As a result, it can be difficult to properly test and monitor complex user designs employing large numbers of alternative implementations and/or monitored signals.
Embodiments of the present disclosure and their advantages are best understood by referring to the detailed description that follows. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures.